Join the Front-End Design team, at the core of our development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications.
Implement Verification environment UVM based.
Collaborate with Design engineers to resolve bugs and achieve coverage closure.
Work with the firmware/Lab teams to verify chip flows.
Perform debug, root-cause analysis, and post-silicon validation in the lab.
Requirements:
Minimum Qualifications:
Minimum Qualifications:
B.Sc./M.Sc. in Electrical Engineering from a top university.
3+ years of experience in the filed.
knowledge with UVM and functional verification methodologies.
Preferred Qualifications:
Experience with MATLAB simulations and bit-exact modeling environments.
Familiarity with mixed-signal systems and environments.
Knowledge and hands-on experience with Clock Domain Crossing (CDC).
This position is open to all candidates.
