Required Senior Staff DSP Design Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the architect for high-speed data paths, you will define the roadmap for scaling interconnect speeds. You will evaluate and select key technologies such as Co-Packaged Optics (CPO), advanced modulation formats, and new Forward Error Correction (FEC) methods to support future Artificial Intelligence (AI) computing clusters.
Responsibilities
Identify the "limits of physics" for current Digital Signal Processing (DSP) architectures and pivot the team toward next-generation solutions, such as Machine Learning (ML)-based equalization or optical-specific DSP.
Define the requirements for DSP test chips to validate new architectures in advanced nodes before they hit production.
Drive the long-term power-reduction roadmap, ensuring our interconnects do not become the thermal bottleneck.
Represent us in the Optical Internetworking Forum (OIF) and Institute of Electrical and Electronics Engineers (IEEE) standards, ensuring our hyperscale requirements for latency and power are reflected in global specifications.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the architect for high-speed data paths, you will define the roadmap for scaling interconnect speeds. You will evaluate and select key technologies such as Co-Packaged Optics (CPO), advanced modulation formats, and new Forward Error Correction (FEC) methods to support future Artificial Intelligence (AI) computing clusters.
Responsibilities
Identify the "limits of physics" for current Digital Signal Processing (DSP) architectures and pivot the team toward next-generation solutions, such as Machine Learning (ML)-based equalization or optical-specific DSP.
Define the requirements for DSP test chips to validate new architectures in advanced nodes before they hit production.
Drive the long-term power-reduction roadmap, ensuring our interconnects do not become the thermal bottleneck.
Represent us in the Optical Internetworking Forum (OIF) and Institute of Electrical and Electronics Engineers (IEEE) standards, ensuring our hyperscale requirements for latency and power are reflected in global specifications.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
12 years of experience in Silicon Architecture, Mixed-Signal DSP, Communication Theory, or Systems Engineering.
Experience defining architectural specifications for high-bandwidth interconnects.
Experience with silicon development from initial concept through to high-volume production (Graphic Design System II (GDSII) to market).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.
Experience representing organizations in industry standards bodies (e.g., IEEE, OIF, PCIe-SIG, or CXL).
Understanding of advanced low power DSP implementation.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
12 years of experience in Silicon Architecture, Mixed-Signal DSP, Communication Theory, or Systems Engineering.
Experience defining architectural specifications for high-bandwidth interconnects.
Experience with silicon development from initial concept through to high-volume production (Graphic Design System II (GDSII) to market).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.
Experience representing organizations in industry standards bodies (e.g., IEEE, OIF, PCIe-SIG, or CXL).
Understanding of advanced low power DSP implementation.
This position is open to all candidates.
