Responsibilities
Develop and build complex emulation models for coming generations of accelerators, including transactors like PCIe, SPI, and embedded CPUs
Work with the software, design, development, and verification teams to understand the functional and performance goals of the products design
Optimize the model for speed and capacity and develop debug abilities to support software and firmware teams
Work with software design and development teams to define and develop BFM, test bench, and checker tools
Review specifications and develop attributes, tests, and coverage plans for the emulation system
Requirements
B.Sc. or higher degree in Electrical Engineering from a leading institution
3+ years experience in building emulation models, running tests on emulation machines, and debugging issues within the time constrictions of silicon design projects while handling multiple priorities
Experience with emulation platforms such as Palladium, Veloce, or Zebu, including compilation, debug, power, performance, and throughput tuning.
Familiarity with Linux environments
Experience with languages such as : C, C++, Perl, Ruby, System Verilog, Verilog, Make
Familiarity with interfaces such as PCIe, SPI, UART, ETH: advantage
Familiarity with embedded systems: advantage
Knowledge of FPGA: advantage














