We are seeking a talented Code Generation and Optimization Expert to join our bleeding-edge CodeGen team in Israel. In this high-visibility, hands-on role, you will play a pivotal part in building next-generation runtime compiler.
Responsibilities
Design and maintain the distributed and heterogeneous executable that is generated by our compiler stack.
Using the MLIR framework, transform high level compiler outputs into hardware-specific binary images, memory mappings, execution parameters, resource allocation, region grouping, and cross-domain coordination for distributed systems.
Design and maintain the API layer (libRT.a) connecting compiler-generated code with runtime services, ensuring seamless integration across different execution domains.
Collaborate closely with hardware, architecture, verification and other compiler teams to align software with hardware requirements and behavior.
Requirements:
Requirements
Education: B.Sc. or higher in Computer Science, Computer Engineering; or equivalent experience.
Strong background in modern C++ (C++11 and newer) and system-level software development.
5+ years software engineering experience in large/complex projects.
Strong data structure intuition, graph operations, and algorithm design.
Comfortable working in hardware-aware environments, even if not directly writing low-level drivers or firmware.
Experience in chip development flows, hardware simulation, system modeling, embedded/real-time systems development, and data structure design, including complex serialization formats: an advantage.
Proficiency with hardware-aware deployment and model behavior in generative AI mechanics: an advantage.
Familiarity with compiler engineering concepts (IR, optimization techniques, dataflow analysis): an advantage.
Requirements
Education: B.Sc. or higher in Computer Science, Computer Engineering; or equivalent experience.
Strong background in modern C++ (C++11 and newer) and system-level software development.
5+ years software engineering experience in large/complex projects.
Strong data structure intuition, graph operations, and algorithm design.
Comfortable working in hardware-aware environments, even if not directly writing low-level drivers or firmware.
Experience in chip development flows, hardware simulation, system modeling, embedded/real-time systems development, and data structure design, including complex serialization formats: an advantage.
Proficiency with hardware-aware deployment and model behavior in generative AI mechanics: an advantage.
Familiarity with compiler engineering concepts (IR, optimization techniques, dataflow analysis): an advantage.
This position is open to all candidates.
