What you'll be doing:
Lead PI definition and implementation for board-level designs, from concept and architecture through validation, qualification and release to production.
Define the power core architecture and requirements and serve as the technical lead for all power-related performance and debug activities
Work closely with power supply vendors to align solutions with our product needs, and build and optimize configuration files for programmable regulators.
Own power delivery network (PDN) design for complex network adapter boards, including rail partitioning, decoupling strategy, VR selection and dynamic load support.
Perform system-level power integrity simulations (frequency and time domain) and co-simulation of circuits and PDN models to predict noise.
Create and maintain board PI design guidelines: stackup, materials, breakout, routing, decoupling and placement rules for layout teams and external partners.
Use advanced 2D/3D EM tools to model and optimize vias, planes, connectors, sockets and other interconnect elements for power integrity.
Perform lab characterization and correlation using VNA, TDR and high‑bandwidth oscilloscopes; refine models and design rules based on measurement data.
What we need to see:
B.Sc. in Electrical Engineering (or equivalent experience).
5+ years of industry experience in signal and/or power integrity for high-speed board or system designs.
Strong understanding of electromagnetics, transmission line theory, PDN behavior and their application.
Expert-level proficiency with EM and PI tools (for example, Ansys HFSS/Q3D/SIwave, CST, or equivalent) and SPICE-based time-domain simulations.
Proven experience in PDN analysis, including model generation, impedance targets, resonance mitigation and time-domain noise simulations.
Hands-on lab experience with VNA, TDR and oscilloscopes for PI/SI validation, de-embedding and model correlation.
Ability to work independently in an intense, multi-disciplinary environment with strong ownership and excellent interpersonal skills.
Ways to stand out from the crowd:
Deep experience designing PDNs for complex multilayer boards with high-current, low-voltage rails supporting advanced networking or compute ASICs.
Demonstrated background in PI co-simulation flows, PSIJ analysis and end-to-end system modeling (die-package-board).
Experience with scripting and data analysis using MATLAB, Python or C for simulation automation and large-signal data processing.
Exposure to advanced packaging and interconnect technologies (for example, TSV, high-speed connectors, advanced laminates).
Practical knowledge of PCB fabrication, product qualification flows and lab debug of complex high-speed boards.
