What you'll be doing:
Learn and understand the NIC u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the next generation of our systems. Work closely with GPU and CPU teams for building the cut-edge systems.
Define the implementation of the most sophisticated features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Understand our system requirements and help define the POR of our NIC and DPU product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand SoC flows, PCIe, Ethernet, InfiniBand and NvLink protocols.
B.Sc./M.Sc in Electrical Engineering from a known university.
Excellent grades.
5+ years of experience in ASIC design/uarch/arch/performance.
At least 4 years of hands on experience in writing Verilog/VHDL or
Strong analytic capabilities, and passion for solving logical issues.
Strong debug skills.
Ability to drive complex activities involving many interfaces and teams.
Good communications skill.
