Required DFT Engineer
LOCATION:
Caesarea, Israel
What You'll Do:
You'll be joining our Hardware Design team at Silicon One group which is at the center of the silicon development.
Our engineers deal with all chip design aspects: definition, architecture, micro architecture, design, verification, signoff and validation.
We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.
LOCATION:
Caesarea, Israel
What You'll Do:
You'll be joining our Hardware Design team at Silicon One group which is at the center of the silicon development.
Our engineers deal with all chip design aspects: definition, architecture, micro architecture, design, verification, signoff and validation.
We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.
Requirements:
Design for Test Engineer with experience in all DFT aspects from the Pre-Silicon design, Silicon debug and up to full qualification.
B.Sc/M.Sc in EE from a top university
Experience in ATPG area
Ability to define DFT methodology and take it from the design stage to production.
Design for Test Engineer with experience in all DFT aspects from the Pre-Silicon design, Silicon debug and up to full qualification.
B.Sc/M.Sc in EE from a top university
Experience in ATPG area
Ability to define DFT methodology and take it from the design stage to production.
This position is open to all candidates.
