Roles and responsibilities:
Join a team of VLSI frontend design engineers in Chain-Reactions projects.
Define, plan and implement our next chip in Chain-Reactions on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.
Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
8+ years of VLSI experience.
Experience with multi clock domain, multi power domain designs (UPF).
Methodologic approach.
Strong Motivated to learn quickly, hard-working, and is results-oriented.
Great interpersonal relations skills.
Preferred:
Networking design experience Major Advantage
Backend experience: STA tools, formal equivalence tools, frontend/backend handoff methodologies.
SoC design/Integration experience.
Proven Methodologies and Environmental Building Experience.
Strong proficiency in scripting language, such as, Perl, Tcl, Python, Make, and automation methods/algorithms.
