As a senior emulation engineer, you will have the responsibilities as follows: Work closely with emulation, architecture and verification teams to create and enhance emulation environments. Work with the leading emulation vendors to debug issues and deploy new capabilities. Develop new emulation workloads and platforms to enhance user productivity . Develop high performance emulation models and transactors in system Verilog and C/C++ . Support multiple emulation environments using the latest emulation techniques Root cause failing SoC/Processor tests and emulator environment issues.
Minimum Qualifications
BSC in Electrical Engineering/Computer engineering.
Preferred Qualifications
Emulation experience with Palladium, Veloce, or Zebu – including compilation, debug, performance and throughput tuning, and implementation of advanced features / or experience with FPGA systems such as HAPS, Protium, Primo or EP1.
Good self learning capabilities.
Experience with C++ and system Verilog verification systems and environments.
Experience working in Linux environment and writing 'make' based build systems.
Experience with creating and supporting job submission and tracking tools preferred.
